Felch A, Nageswaran J, Chandrashekar A, Furlnog J, Dutt N, Granger R, Nicolau A, Veidenbaum A (2007). Accelerating brain circuit simulations of object recognition with a Sony Playstation 3.
Moorkanikara J, Chandrashekar A, Felch A, Furlong J, Dutt N, Nicolau A, Veidenbaum A, Granger R.
Humans outperform computers on many natural tasks including vision. Given the human ability to recognize objects rapidly and almost effortlessly, it is pragmatically sensible to study and attempt to imitate algorithms used by the brain. Analysis of the anatomical structure and physiological operation of brain circuits has led to derivation of novel algorithms that, in initial study, successfully address issues of known difficulty in visual processing. These algorithms are slow on conventional uni-processor based systems, but as might be expected of algorithms designed for highly parallel brain architectures, they are intrinsically parallel and lend themselves to efficient implementation across multiple processors. This paper presents an implementation of such parallel algorithms on a CELL processor and demonstrates the potential to support the massive parallelism inherent in these algorithms by exploiting the CELL’s parallel instruction set and by further extending it to low-cost clusters built using the Sony PlayStation 3 (PS3). The paper describes the modeled brain circuitry, derived algorithms, implementation in the PS3, and initial performance evaluation with respect both to speed and visual object recognition efficacy. The results show that a parallel implementation can achieve about 140x performance improvement on a cluster of 3 PS3 consoles. More importantly, we show that the improvements scale linearly with added processing elements. These results provide a new platform enabling extended investigation of much larger-scale brain circuit models. Early prototyping of such large-scale models has yielded evidence of their efficacy in recognition of time-varying, partially occluded, scale-invariant objects in arbitrary scenes.